Senior Principal Engineer - FW/SW Development
Astera Labs
$180,000 - $250,000 / year
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Description
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.
Role Overview
Astera Labs is seeking a Senior Principal / Distinguished Engineer - FW/SW Development to join our engineering team in San Jose, CA. This is a high-impact individual contributor role at the heart of our Intelligent Connectivity Platform, where you'll architect and develop firmware and software that powers the next generation of AI infrastructure connectivity solutions.
As a Senior Principal / Distinguished Engineer, you'll operate across the full stack — from low-level embedded firmware running on custom silicon to higher-level software tools and frameworks that enable our customers to deploy and manage Astera Labs products at scale. You'll work at the intersection of hardware and software, collaborating closely with ASIC design, verification, applications, and systems engineering teams to deliver world-class solutions spanning PCIe, CXL, and Ethernet connectivity.
This role offers extraordinary breadth and technical ownership. You'll influence architectural decisions across multiple product lines, mentor engineers across the organization, and drive best practices in firmware/software development as Astera Labs continues its hyper-growth trajectory powering the AI revolution.
Key Responsibilities
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Firmware & Software Architecture
- Architect and develop production-quality embedded firmware for Astera Labs connectivity ASICs, including boot code, initialization sequences, and runtime firmware
- Design and implement host-side software, drivers, and SDK components that enable seamless integration of Astera Labs products into customer platforms
- Define firmware/software architecture strategies that scale across multiple product lines and generations
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Cross-Functional Technical Leadership
- Partner with ASIC design and verification teams to define hardware-firmware interfaces and co-design features for optimal system performance
- Drive technical decisions spanning firmware, diagnostic tools, manufacturing software, and customer-facing utilities
- Collaborate with applications and field engineering teams to resolve complex system-level issues at customer sites
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Quality & Best Practices
- Establish and evolve firmware/software development processes, coding standards, and CI/CD practices across the engineering organization
- Lead design and code reviews, driving a culture of engineering excellence and continuous improvement
- Mentor and guide engineers across multiple teams, raising the overall technical bar of the organization
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Innovation & Strategy
- Evaluate emerging technologies and industry trends to inform next-generation firmware/software strategies
- Contribute to product roadmap discussions, providing firmware/software feasibility analysis and effort estimation
- Drive innovation in areas such as firmware update mechanisms, telemetry, RAS features, and manageability frameworks
Basic Qualifications
- Bachelor's degree in Computer Science, Electrical Engineering, Computer Engineering, or a related field
- 12+ years of experience in firmware and/or software development for semiconductor or systems companies
- Strong proficiency in C and C++ for embedded and systems-level programming
- Experience developing firmware for ARM-based SoCs or custom ASIC platforms
- Deep understanding of hardware-software interfaces, register programming, and low-level debug techniques
- Experience with high-speed interconnect protocols such as PCIe, CXL, or Ethernet at the firmware/driver level
Preferred Qualifications
- Master's degree in Computer Science, Electrical Engineering, or related field
- Experience with RTOS-based and bare-metal firmware development environments
- Proficiency in Python for automation, tooling, and test development
- Familiarity with Linux kernel development, device drivers, or platform firmware (UEFI/BIOS)
- Track record of leading firmware/software efforts from architecture through production across multiple product generations
- Experience in the data center, AI/ML infrastructure, or high-performance computing domains
The salary range for this position is $180,000 to $250,000 depending on experience, level, and business need. This role may be eligible for discretionary bonus, incentives and benefits.
We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.
Benefits
- bonus
About this role
Astera Labs is building the connectivity infrastructure that powers modern AI systems, and this Senior Principal Engineer role puts you at the center of that mission. You'd own firmware and software architecture across the full stack—from bare-metal code running on custom silicon to host-side drivers and SDKs—working with PCIe, CXL, and Ethernet technologies. This is a high-impact individual contributor position where you'd shape architectural decisions across multiple product lines, collaborate closely with ASIC and systems teams, and drive engineering excellence across the organization through mentorship and best practices.
The role demands deep expertise in embedded firmware development, particularly for ARM-based or custom ASIC platforms, combined with strong systems-level programming in C and C++. You'd need at least 12 years in firmware or software development at semiconductor or systems companies, with hands-on experience in hardware-software interfaces and high-speed interconnect protocols. A background in data center, AI infrastructure, or HPC, plus familiarity with Linux kernel work or platform firmware, would be valuable.
This is a full-time, in-office position in San Jose with a salary range of $180,000 to $250,000. It's suited for someone who thrives at the hardware-software boundary, enjoys architectural influence, and wants to work on infrastructure solving real problems at scale during a period of significant company growth.
How this employer is doing
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Astera Labs stock may move 11% on Nov. 3 earnings report, Investing.com
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Pay for this role
$180,000 to $250,000 per year
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