Digital ASIC Design Engineer
AttoTude
Salary undisclosed
Need a reasonable accommodation to apply or interview? Contact us.
JobMinglr uses automated technology to recommend jobs based on profile information and job preferences. Match Score does not determine eligibility for a position, prevent a user from viewing or applying to a job, or make hiring decisions on behalf of an employer.
Description
About the Role
We are seeking an experienced Digital IC Design Engineer to join our growing team. In this role, you will be part of an experienced design team developing cutting-edge DSP and mixed-signal ICs. This is a hands-on technical position that requires in-depth technical expertise, and the ability to work in a team of highly experienced engineers to accomplish the goals.
Key Responsibilities
- Flow system level requirements into Architecture and Design Specifications
- Work closely with Comm Systems Engineers to recommend implementation options for best power, performance, and area.
- Document and write RTL code to meet system requirements
- Write SystemVerilog testbenches and testcases to fully verify the design
- Develop timing constraints, Synthesize the design and perform Static Timing Analysis and Timing Closure.
- Perform gate level simulations.
- Support lab and HW/SW integration post-tapeout
- Collaborate with cross-functional teams to ensure timely project execution and design tape-outs
- Stay updated with the latest trends and technologies in wideband high speed IC design and apply them to improve project outcomes
- Occasional travel to the Bay Area (<10%) for remote position
Qualifications
Required:
- 5+ years of hands-on experience in CMOS (bulk and FinFET), digital IC design in various process technologies
- Proven experience in strong coding/verification in SystemVerilog is required
- Scripting language experience: Tcl, Python, and shell scripts required.
- Bus interfaces: PCIe, AXI, UCIe, SPI, I2C, APB
- Strong communication and teamwork skills
Education:
- Bachelor’s Degree in Electrical Engineering or related field is required
- Master’s Degree in Electrical Engineering, Computer Engineering or a related field is preferred
Preferred:
- Experience designing high speed Modems, SerDes, DSP blocks, FFTs, clock recovery, carrier recovery, digital filters, CTLE, DFE and MLSE.
- Experience matching and debugging Matlab models and vectors in RTL/gate level simulations.
- Experience working on a multidisciplinary team with Systems, RF, Mixed Signal, and SW engineers
- Experience with Cadence tools: XCelium, Genus, Tempus, Conformal, and Voltus
- Experience delivering IP blocks to internal and external customers
- Ability to drive innovation and implement new design methodologies.
About Attotude
AttoTude is at the forefront of revolutionizing data centers through advanced interconnect technology based on wired THz transceivers. By adapting the fiber from photonics and advancing today's ASICs to THz, our innovative AttoEngine eliminates networking bottlenecks, enabling high-speed interconnects for AI data centers. We are committed to overcoming existing networking bottlenecks to unleash the full potential of artificial intelligence.
Why Join Us
· Work at the forefront of semiconductor research and innovation in digital communications.
· Collaborate with a multidisciplinary team driving the next generation of THz technology
· Access to state-of-the-art tools and processes at the leading-edge of ASIC development.
· Competitive compensation, professional growth, and opportunities for scientific contribution.
About this role
AttoTude is building next-generation interconnect technology for AI data centers using THz transceivers, and this role sits at the core of that effort. As a Digital ASIC Design Engineer, you'll own the full digital design flow—from translating system requirements into architecture and RTL, through verification, timing closure, and post-tapeout support. You'll work alongside experienced designers and cross-functional teams (systems, RF, mixed-signal, and software engineers) to deliver high-speed DSP and mixed-signal ICs that push the boundaries of what's possible in wideband communications.
The position demands substantial hands-on expertise: at least five years designing digital ICs in modern CMOS processes, strong SystemVerilog and scripting skills (Tcl, Python, shell), and fluency with standard bus interfaces and Cadence tools. Experience with high-speed analog-digital blocks—SerDes, modems, FFTs, clock and carrier recovery, digital filters—is highly valued, as is the ability to correlate Matlab models with RTL and gate-level simulations. A bachelor's in electrical engineering is required; a master's is preferred.
This is a full-time, in-office role based in Nuremberg, Bavaria, with occasional travel to the Bay Area. It's suited to someone who thrives in technically rigorous environments, enjoys collaborating across disciplines, and wants to contribute to fundamental advances in semiconductor design rather than incremental work.
This role's local market on JobMinglr
Pay for this role
The employer didn't post a pay range for this role. That usually means pay is set in negotiation, which favors whoever arrives with numbers. Check ranges on comparable Digital ASIC Design Engineer postings in Nuremberg, and analyze any offer before you accept it.
Before you apply, worth reading
How JobMinglr reads this job
Every listing here is scored against your profile before you apply: skills overlap, experience level, location and work arrangement, each weighted and explained. You see the score and the reasons, not just a list. How the matching works.