Senior Principal Test Engineer
Astera Labs
$205,000 / year
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Description
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.
- Test Strategy and Product Ownership
- Define and own comprehensive test strategies, specifications, and plans from product definition through high-volume production.
- Establish coverage, quality, yield, test-time, and cost objectives, and drive measurable improvements across the product lifecycle.
- Partner with design and product engineering teams to identify testability requirements and make effective design-for-test tradeoffs.
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Architect tester solutions and guide development of Tester HW design to meet specific and roadmap of products
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Validate Tester Designs and characterize before implementing into Mass Production.
- Apply understanding of physical-layer behavior to investigate failures, interpret lab and production data, and resolve complex performance issues.
- Lead root-cause analysis and yield improvement using protocol analyzers, oscilloscopes, manufacturing data, and structured failure analysis.
- Technical Leadership and Cross-Functional Execution
- Serve as a senior technical advisor across test, DFT, design, operations, quality, and external manufacturing organizations.
- Establish best-known methods, scalable test processes, and automation practices that improve engineering effectiveness and manufacturing readiness.
- Mentor engineers, influence technical decisions, and communicate risks, tradeoffs, and recommendations to cross-functional stakeholders.
- Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related technical field.
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12–20 years of experience in Test engineering or Product Engineering from development through high-volume manufacturing.
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Strong experience developing custom test solutions for high-speed, mixed-signal products for high volume manufacturing.
- Working knowledge of high-speed protocols and physical-layer behavior, including PCIe, Ethernet, DDR, NVMe, or USB.
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Experience with Test SW development, production debug, and test-time optimization.
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Proven experience developing and designing custom Test Hardware for PCBA High volume manufacturing.
- Master’s or PhD in Electrical Engineering, Computer Engineering, or a related field.
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Experience with Electrical HW board design on complex Test HW implementation.
- Strong knowledge of DFT techniques such as SCAN, MBIST, SerDes, and functional test, along with control interfaces such as I2C, I3C, SPI, MDIO, and JTAG.
- Proficiency in C/C++ or Python for ATE programming, data processing, and test automation; familiarity with databases and yield analytics.
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Demonstrated ability to provide technical leadership, mentor engineers, influence cross-functional decisions, and deliver results in a fast-paced, high-growth environment.
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Proficient in Mandarin Chinese.
The base salary range is $205,000 USD - $260,000 USD. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.
We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.
About this role
Astera Labs is building connectivity infrastructure for AI at scale, and this Senior Principal Test Engineer role sits at the heart of ensuring their mixed-signal silicon and high-speed products work reliably from development through mass production. You'd own test strategy end-to-end—defining coverage and quality objectives, architecting tester solutions, and driving yield and cost improvements across products that integrate CXL, Ethernet, NVLink, and PCIe technologies. This is a technical leadership position where you'll partner with design, DFT, product engineering, and manufacturing teams to solve complex physical-layer failures and establish best practices that scale.
The role demands 12–20 years of hands-on experience developing custom test solutions for high-speed, mixed-signal products in high-volume manufacturing environments. You'll need strong working knowledge of protocols like PCIe, Ethernet, or DDR; proven expertise in test software development, test hardware design for PCBA, and production debug; and the ability to apply oscilloscopes, protocol analyzers, and structured failure analysis to real problems. Beyond technical depth, you'll mentor engineers, communicate tradeoffs to stakeholders, and influence decisions across the organization in a fast-moving, hyper-growth setting.
This is an in-office role in San Jose with a base salary of $205,000–$260,000. It suits someone with deep test engineering credentials who wants to shape product quality at scale and lead a technical function in a high-stakes, infrastructure-focused company.
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Pay for this role
$205,000 per year
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