Senior Digital Design Engineer
Astera Labs
Salary undisclosed
Need a reasonable accommodation to apply or interview? Contact us.
JobMinglr uses automated technology to recommend jobs based on profile information and job preferences. Match Score does not determine eligibility for a position, prevent a user from viewing or applying to a job, or make hiring decisions on behalf of an employer.
Description
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.
Job Description
We are looking for Digital Design Engineers with experience developing micro-architecture and implementation of the front-end circuit design, including RTL, synthesis, IP integration for high performance network controllers. The candidate is preferred to have knowledge of communication/interface protocols such as PCI-Express (Gen-3 and above), Ualink, Esun, Ethernet etc.
Basic Qualifications:
- Strong academic and technical background in electrical engineering. A Bachelor’s degree in EE is required, and a Master’s degree is preferred.
- Professional attitude with the ability to prioritize a dynamic list of multiple tasks.
- Entrepreneurial, open-mind behavior and can-do attitude.
- Authorized to work in the US and start immediately.
Required Experience:
- Hands-on, prefer knowledge of high-speed protocols like PCIe, Ualink, Esun, Ethernet, etc.
- Proven front end design skill – architecture, RTL, simulations and synthesis
- Experience with Synopsys and/or Cadence digital design tools/flows
- Knowledge of design for test (DFT)
- Familiarity with UVM based design verification
- Silicon bring-up and debug experience
Preferred Experience:
- Scripting with Python or other equivalent programming languages.
- Development/support for PCIe or Ethernet Switch products.
We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.
About this role
Astera Labs is seeking a Senior Digital Design Engineer to develop the front-end architecture and implementation of high-performance network controllers that power its AI infrastructure connectivity solutions. The role centers on RTL design, synthesis, and IP integration work, with a strong emphasis on communication protocols like PCIe, ULink, and Ethernet. You'll need proven expertise in digital design flows using Synopsys or Cadence tools, design verification through UVM, and hands-on experience bringing silicon to life through debug and validation.
This position suits engineers with a solid EE foundation (Bachelor's required, Master's preferred) who have shipped real products in networking or connectivity domains. Beyond core design skills, the role values familiarity with design-for-test methodology and the ability to juggle multiple priorities in a fast-moving environment. Experience with scripting languages like Python and prior work on PCIe or Ethernet switches would strengthen your candidacy. The job is based in San Jose and requires in-office presence.
How this employer is doing
average
- H1B: Sponsors Visas
- Sponsors Visas
This role's local market on JobMinglr
Pay for this role
The employer didn't post a pay range for this role. That usually means pay is set in negotiation, which favors whoever arrives with numbers. Check ranges on comparable Senior Digital Design Engineer postings in San Jose, and analyze any offer before you accept it.
Before you apply, worth reading
How JobMinglr reads this job
Every listing here is scored against your profile before you apply: skills overlap, experience level, location and work arrangement, each weighted and explained. You see the score and the reasons, not just a list. How the matching works.