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Digital Design Member of Technical Staff (MTS)

Onsemi

Salary undisclosed

Cork, Co. Cork, IrelandFull-timeOn-siteExpert

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Description

Key Responsibilities

  • Architect, design, and implement digital system controllers for: 
    • Power management
    • Clock management
    • Error detection, reporting, and mitigation subsystems
  • Develop robust digital IP that controls and interacts closely with analog and mixed-signal blocks.
  • Own IP delivery from architecture through RTL, verification, integration, and silicon bring-up support.
  • Drive and support digital-on-top product integration flows, including: 
    • IP integration into SoC environments
    • Clocking, reset, power domain, and safety integration
  • Ensure designs meet automotive functional safety requirements (e.g., ISO 26262 concepts such as ASIL, fault coverage, diagnostic mechanisms).
  • Collaborate cross-functionally with: 
    • Analog design
    • Verification
    • Physical design
    • Systems, safety, and product engineering teams
  • Define and evolve IP roadmaps aligned with: 
    • Platform strategy
    • Product requirements
    • Long-term business objectives
  • Mentor and technically guide junior and mid-level engineers, promoting best practices in design, documentation, and review culture.
  • Contribute to continuous improvement of: 
    • Design methodologies
    • Verification strategies
    • Automation and productivity tools
  • Stay technically curious and engaged with emerging AI/ML applications in digital design, including their potential impact on RTL development, verification, and productivity.

Qualifications

Required Qualifications

  • 15+ years of hands-on digital design experience, primarily in ASIC or SoC development.
  • Proven experience delivering automotive IP with functional safety requirements.
  • Strong background designing digital controllers for analog blocks (e.g., power regulators, PLLs, sensors, clocking systems).
  • Deep understanding of system-level digital integration, including: 
    • Power and clock domain management
    • Reset strategies
    • Error handling and safety mechanisms
  • Solid experience with RTL design (SystemVerilog).
  • Working knowledge of constrained-random verification methodologies, including SystemVerilog and UVM.
  • Demonstrated ability to work effectively as a senior individual contributor, owning complex technical problems end to end.
  • Strong communication skills and a demonstrated willingness to mentor junior engineers.

Preferred / Plus Qualifications

  • Experience with automotive safety standards such as ISO 26262 (concept, system, or IP-level application).
  • Working knowledge of JIRA for task tracking and JAMA for requirements management.
  • Exposure to safety diagnostics, fault injection, or safety verification techniques.
  • Experience contributing to platform-level IP strategies or multi-generation roadmap planning.
  • Familiarity with low-power design techniques and power-aware verification.
onsemi (Nasdaq: ON) is driving disruptive innovations to help build a better future. With a focus on automotive and industrial end-markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a highly differentiated and innovative product portfolio, onsemi creates intelligent power and sensing technologies that solve the world’s most complex challenges and leads the way in creating a safer, cleaner, and smarter world.

More details about our company benefits can be found here:

https://www.onsemi.com/careers/career-benefits

About this role

Onsemi is seeking a senior digital design engineer to architect and own the full lifecycle of digital IP for power management, clocking, and safety-critical subsystems in automotive SoCs. You would work across the analog-digital boundary, designing controllers that integrate tightly with mixed-signal blocks while meeting ISO 26262 functional safety requirements. This is a hands-on role that spans from architecture and RTL development through verification, integration, and silicon validation, with significant cross-functional collaboration across analog, physical design, systems, and safety teams.

The position demands 15+ years of ASIC/SoC experience with a strong track record delivering automotive IP under functional safety constraints. You'll need deep expertise in digital controller design, system-level integration (power domains, clocking, reset strategies), RTL in SystemVerilog, and constrained-random verification. Beyond technical depth, you're expected to mentor junior and mid-level engineers, contribute to design methodology improvements, and help shape multi-generation IP roadmaps aligned with platform strategy and business goals.

This role suits an experienced individual contributor who thrives owning complex problems end to end, communicates clearly across disciplines, and stays engaged with emerging tools and techniques—including AI/ML applications in design and verification. The Cork location requires in-office presence.

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Pay for this role

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