Physical Design Methodology & Flow Engineer
SambaNova
$180,000 - $255,000 / year
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Description
The era of pervasive AI has arrived. In this era, organizations will use generative AI to unlock hidden value in their data, accelerate processes, reduce costs, drive efficiency and innovation to fundamentally transform their businesses and operations at scale.
SambaNova Suite™ is the first full-stack, generative AI platform, from chip to model, optimized for enterprise and government organizations. Powered by the intelligent SN40L chip, the SambaNova Suite is a fully integrated platform, delivered on-premises or in the cloud, combined with state-of-the-art open-source models that can be easily and securely fine-tuned using customer data for greater accuracy. Once adapted with customer data, customers retain model ownership in perpetuity, so they can turn generative AI into one of their most valuable assets.
About the roel
SambaNova Systems is looking for a talented and motivated Physical design flow owner/lead to help us build state of the art RDU chips for machine learning and artificial intelligence.
Responsibilities
- Develop and maintain physical composition flow utilizing Cadence tool sets, including Genus, Innovus, Cerebrus, , etc.
- Closely work with physical designers to address a diverse range of flow and design issues.
- Collaborate with tool vendors to address tool bugs and flow enhancement.
Required Qualifications
- BS, MS, or PhD degree in Computer Science, Computer Engineering or Electrical Engineering
- 5+ years of industry experience in physical design and flow development
- Strong understanding of rtl to gds flow and mythologies, including synthesis and place and route;
- Proficiency in scripting languages, e.g. TCL, Perl and Python, etc. is required;
- Good understanding physical design rules especially for TSMC advanced technology nodes 3nm below;
- Familiarity with Cadence physical design reference flow and mythologies is highly desirable;
- Fluency in Claude / AI tools for flow development is a plus
Base Salary Range:
Submission Guidelines
Please note that in order to be considered an applicant for any position at SambaNova Systems, you must submit an application form for each position for which you believe you are qualified.
EEO Policy
SambaNova Systems is an Equal Opportunity/Affirmative Action Employer. All qualified applicants will receive consideration for employment without regard basis of age (40 and over), color, disability, gender identity, genetic information, marital status, military or veteran status, national origin/ancestry, race, religion, creed, sex (including pregnancy, childbirth, breastfeeding), sexual orientation, and any other applicable status protected by federal, state, or local laws.
Benefits Summary for US-Based, Full-Time Employment Positions
SambaNova offers a competitive total rewards package, including the base salary, plus equity and benefits. We cover 95% premium coverage for employee medical insurance, and 77% premium coverage for dependents and offer a Health Savings Account (HSA) with employer contribution. We also offer Dental, Vision, Short/Long term Disability, Basic Life, Voluntary Life, and AD&D insurance plans in addition to Flexible Spending Account (FSA) options like Health Care, Limited Purpose, and Dependent Care. Our library of well-being benefits available to you and your dependents includes a full subscription to Headspace, Gympass+ membership with access to physical gyms, One Medical membership, counseling services with an Employee Assistance Program, and much more.
About this role
SambaNova is building AI chips for enterprise machine learning, and this role owns the physical design methodology and flow that gets those designs from concept to silicon. You'd develop and maintain the RTL-to-GDS flow using Cadence tools like Genus and Innovus, work directly with physical designers to solve design and flow problems, and partner with tool vendors on bug fixes and enhancements. This is a hands-on leadership position focused on flow infrastructure rather than individual chip design.
The role requires at least five years in physical design and flow development, with deep expertise in synthesis, place-and-route, and TSMC advanced nodes (3nm and below). You'll need strong scripting skills in TCL, Perl, or Python, and solid knowledge of Cadence's reference methodologies. Familiarity with AI tools for flow development is valued but not required. A degree in computer science, computer engineering, or electrical engineering is expected.
The position is full-time and in-office in San Jose. The base salary range is $180,000 to $255,000, plus equity and a comprehensive benefits package including 95% medical premium coverage, dental, vision, disability insurance, and wellness perks like Headspace and Gympass+.
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Pay for this role
$180,000 to $255,000 per year
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