What MatX Is Building MatX's mission is to make the world’s best AI models run as efficiently as allowed by physics, bringing the world years ahead in AI quality and availability.

About The Role

This is a senior-level, highly specialized engineering role focused on the design, qualification, and productization of next-generation optical interconnect technologies for AI scale-up and scale-out networks. The engineer owns the full lifecycle — from component characterization and link budget analysis to system-level bring-up and data center deployment — across the evolving spectrum of optical integration approaches: pluggables, NPO, and CPO .

What You'Ll Do

6T products including AEC and pluggable optical transceivers. 6T deployment in scale-up AI fabrics Perform link budget analysis and evaluate performance metrics including TDECQ, OMA, stressed receiver sensitivity, and associated diagnostics. Component System Engineering Develop expertise in transceiver components including CW lasers, SiPh PICs, EML, DSP, passive subassemblies, their failure modes, and characterization methodologies.

Evaluate silicon photonics (SiPh) transceivers, VCSEL-based MMF links, and EML-based SMF solutions for scale-up fabric topologies Apply knowledge of thermal, mechanical, power, and signal integrity constraints in dense hardware environments. 2T (400G/lane) roadmaps and new form factors emerging with LPO and CPO. Supply Chain Vendor Management Develop familiarity with subcomponent supply chains and global manufacturers, ODMs, and CMs.

What We'Re Looking For

3dj electrical and optical compliance specs In-depth expertise in debugging and troubleshooting hardware; experience in the product development lifecycle.

Requirements

: MPO/MTP connector, fiber cleanliness, insertion loss, PMD, and bend radius for high-density AI cluster cabling Experience with link budget modeling tools (MATLAB, Python-based photonic simulation, GNPY) Ability to collaborate with switch ASIC teams (SerDes architects), PCB/signal integrity engineers, thermal/mechanical engineers, and NOS/software teams Strong technical documentation and vendor communication skills Bonus Points Background in AI accelerator or GPU system validationFamiliarity with JEDEC or PCIe compliance testing methodologiesExperience with statistical process control (SPC) or large-scale data analysis for silicon characterization

Compensation

The US base salary for this full-time p

Optical Network Engineer