Senior Software Engineer - GPU Kernel Authoring & Optimization

CoreWeave is The Essential Cloud for AI™. Built for pioneers by pioneers, CoreWeave delivers a platform of technology, tools, and teams that enables innovators to build and scale AI with confidence. Trusted by leading AI labs, startups, and global enterprises, CoreWeave combines superior infrastructure performance with deep technical expertise to accelerate breakthroughs and turn compute into capability.

Founded in 2017, CoreWeave became a publicly traded company (Nasdaq: CRWV) in March 2025. com .

About The Role

: CoreWeave is the top-rated AI-cloud for high-performance GPU infrastructure across AI/ML, visual effects, rendering, and real-time inference. Our stack is engineered for speed, scale, and cost-efficiency—an unmatched alternative to traditional hyperscalers. At CoreWeave, infrastructure is the product.

We're looking for a Senior Engineer for CoreWeave's Benchmarking Performance team, focused on kernel authoring and optimization. You will write, profile, and tune the GPU kernels that sit on the critical path of large-scale model serving—squeezing maximum throughput and minimum latency out of every SM, tensor core, and byte of memory bandwidth. You will also aid us in achieving industry-leading end-to-end performance benchmarking publications such as MLPerf.

You will be an owner who leads designs, raises engineering standards, and delivers measurable improvements to latency, throughput, and reliability across our inference stack. You'll partner with product, orchestration, and hardware teams to turn kernel-level wins into end-to-end gains and meet strict P99 SLAs at scale. Author, profile, and optimize CUDA kernels—GEMMs, attention, MoE routing, quantization, KV-cache, and fused epilogues—on the critical path of LLM inference.

Optimize for the hardware: exploit tensor cores and tune occupancy, memory coalescing, shared-memory/register usage, and overlap of compute with data movement. Use kernel-authoring DSLs and compilers to prototype and ship kernels quickly without sacrificing performance. Benchmark rigorously: build reproducible microbenchmarks and roofline analyses, and validate that kernel-level wins translate to end-to-end latency/throughput gains across model-serving stacks (vLLM, TensorRT-LLM, llm-d, SGLang).

Implement and maintain benchmarking workflows for end-to-end MLPerf Inference (and Training) runs, including workload setup, cluster configuration, runbooks, and result validation. Lead design reviews and drive architecture within the team; decompose multi-service work into clear milestones. Mentor junior engineers; review cross-team designs and elevate coding/testing standards.

Help ensure reproducible, well-documented benchmarking and kernel-optimization processes.

Who You Are

: 5+ years of experience building high-performance computing, GPU/accelerator software, or performance-critical systems. Hands-on CUDA experience is required—you have written and optimized custom kernels and are fluent with the CUDA programming and memory model. Deep understanding of GPU architecture and performance: tensor cores, warp/occupancy tuning, the memory hierarchy and bandwidth, NVLink/PCIe, and profiling with Nsight Compute/Systems.

Strong coding in C++ and Python; comfortable reading and writing low-level, performance-sensitive code. Familiarity with model-serving stacks (vLLM, TensorRT-LLM, llm-d, SGLang) and the kernels that dominate their inference cost. Strong communicator comfortable collaborating with cross-functional teams and external partners.

Preferred: Triton or Mojo for authoring custom GPU kernels — highly desired. CuTe DSL for Python-based kernel authoring on NVIDIA GPUs. JAX and its Pallas kernel language for authoring kernels on GPU/TPU.

HIP / ROCm and AMD GPU experience. NCCL and collective-communication performance. Experience with alternative accelerators such as Google TPUs and Meta's MTIA.