Senior Digital Design Engineer, Air Dominance and Strike

S. and allied military capabilities with advanced technology. By bringing the expertise, technology, and business model of the 21st century’s most innovative companies to the defense industry, Anduril is changing how military systems are designed, built and sold.

Anduril’s family of systems is powered by Lattice OS, an AI-powered operating system that turns thousands of data streams into a realtime, 3D command and control center. As the world enters an era of strategic competition, Anduril is committed to bringing cutting-edge autonomy, AI, computer vision, sensor fusion, and networking technology to the military in months, not years.

ABOUT THE TEAM

The Air Dominance and Strike (AD&S) Electrical Engineering Team develops high-reliability avionics, embedded processing, and power systems for Group 5 air vehicles and missile platforms. Working across hardware, software, and mission autonomy, the team delivers flight-critical electronics, PCB assemblies, and FPGA-based processing architectures for Anduril's next-generation autonomous air platforms.

Requirements

ABOUT THE JOB We are looking for an Senior FPGA Design Engineer to join our team in Costa Mesa, CA. In this role, you will design and integrate RTL for FPGA and SoC platforms used in high-performance embedded systems, avionics, and mission-critical hardware.

and microarchitecture through RTL implementation, simulation, synthesis, timing closure, lab bring-up, and system integration. We welcome candidates from a range of complex digital hardware environments.

into microarchitecture, interface definitions, and implementation plans. Own FPGA designs or major functional blocks from architecture through integration, timing closure, and lab debug. Develop and execute simulation, synthesis, and implementation flows, including timing and resource closure.

Debug functional, timing, and integration issues in simulation and on hardware. Support board bring-up, lab validation, and system integration on target platforms. Collaborate with hardware, embedded software, systems, and verification engineers to deliver complete solutions.

Participate in design reviews, code reviews, and technical documentation. Contribute to reusable design practices, coding standards, and development workflows. Support rapid prototyping while maintaining the engineering rigor required for production hardware.

WHAT YOU'LL DO

Design and implement RTL in VHDL, Verilog, or SystemVerilog for FPGA and SoC-based systems.

REQUIRED QUALIFICATIONS

Bachelor's degree in Electrical Engineering, Computer Engineering, or related field. 4+ years of FPGA, ASIC, or closely related digital design experience. Proficiency in VHDL and/or Verilog/SystemVerilog.

Hands-on experience with simulation, synthesis, implementation, and timing closure on modern FPGA platforms. Hands-on debug experience in simulation and on hardware. Strong digital design fundamentals, including clocking, resets, state machines, CDC awareness, and interface design.

Proficiency with Linux-based development environments, Git-based workflows, and Tcl and/or Python scripting. Strong written and verbal communication skills. S.

Secret security clearance.

PREFERRED QUALIFICATIONS

7+ years of FPGA development experience. Experience owning a major functional block, subsystem, or full FPGA design from concept through integration. Familiarity with AMD (Xilinx), Intel/Altera, or Lattice FPGA development environments.