ASIC Design Verification Engineer

Celero Communications, Inc. is an exciting and fast-growing start-up in the semiconductor industry, pushing boundaries with innovative technologies that power the world’s most advanced AI and data center infrastructure. We are seeking an skilled and motivated ASIC Verification Engineer to join our dynamic team.

You will play a key role in the development of optical transceivers for next-generation optical modems, ensuring the functionality and reliability of our ASIC designs.

Key Responsibilities

• Develop and implement verification plans for complex ASIC designs. • Design and maintain testbenches using SystemVerilog and UVM.

Requirements

• Debug and resolve issues in collaboration with design and system teams. • Develop and maintain reusable verification components and environments. • Perform code and functional coverage analysis to ensure thorough verification.

• Collaborate with cross-functional teams on system integration and validation.

Qualifications

• Bachelor’s or higher degree in Electrical Engineering, Computer Engineering, or a related field. • 3+ years of experience in ASIC verification. • Proficiency in Verilog, SystemVerilog, UVM.

• Strong understanding of ASIC verification flows and methodologies. • Experience with formal verification techniques. • Knowledge of MATLAB and C/C++ for system simulation and evaluation.

• Knowledge of low-power design techniques. • Excellent problem-solving, strong communication and teamwork skills. , Python, Tcl, Perl) • Strong knowledge of Digital Signal Processing (DSP), Digital Communication, and Forward Error Correction (FEC) techniques.

• Ability to multitask and adapt to a fast-paced, dynamic environment.