Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible.

We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is looking for a Sr.

Design Verification Engineer to lead verification efforts on state of art digital designs. This role owns verification strategy, builds advanced test environments, mentors engineers, and ensures designs are fully tested for functionality, performance, and quality. You will help shape how we verify the compute engines that power the open future of AI and high performance compute.

This role is remote, based in Munich, Germany. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Who You Are

Lead the definition and execution of comprehensive verification plans for complex digital blocks and systems. Drive verification methodologies and strategy across projects, setting best practices and standards. Build advanced test environments using SystemVerilog and UVM, and execute testbenches, cases, and coverage.

Collaborate with architecture, design, and software teams to align on specifications and debug issues. Guide and mentor junior engineers, contributing to a high performing verification team. What We Need 10+ years of industry experience in digital design verification with a strong record of technical leadership.

Deep expertise in SystemVerilog and UVM, along with familiarity with formal verification methods. Strong understanding of computer architecture, microarchitecture, and SoC integration. Hands-on experience with tools like Questa, VCS, or similar simulation environments.

Excellent communication skills and the ability to lead cross functional collaboration. What You Will Learn Work at the intersection of next gen RISC V CPUs and AI accelerators in a chiplet based architecture. Influence verification strategy across multiple product lines in a rapidly evolving tech environment.

Collaborate with top tier hardware architects and software teams building full stack solutions. Gain exposure to silicon bring up, post silicon validation, and end to end product delivery. Help shape industry leading verification methodologies in a fast paced, innovation first culture.

Compensation

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Benefits

, and we are an equal opportunity employer. S. export-controlled technology.

S. S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2).

Requirements

S. S. S.

Commerce Department or applicable federal agency. S. export laws, any offer of employment will be rescinded.

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