Venturi Astrolab, Inc. (Astrolab) is pioneering new ways to explore and operate on distant planetary bodies. We are singularly focused on designing, building, and operating a fleet of multi-purpose commercial planetary rovers to extend and enhance humanity’s presence in the solar system.

We are seeking motivated, creative, and exceptional people to join our world-class team. The Avionics team is responsible for all aspects of the electrical systems and hardware on Astrolab’s electric rover vehicles and ground support equipment. We work collaboratively with all teams at Astrolab to provide exceptionally capable and reliable electronics to serve our missions.

The Lead FPGA Engineer will lead the FPGA Engineering group and participate in all aspects of the development and test of Avionics FPGA RTL designs for Astrolab rovers. The ideal candidate has 10+ years of experience in FPGA firmware development including RTL design, simulations, analysis, verification, and HW testing. This position will report to the Director of Avionics Engineering and will be based in our Hawthorne, CA office.

Own and define the vehicle system FPGA related architectures, standards, practices, processes, tools, etc.

Requirements

in collaboration with other engineering disciplines including defining HW/SW interfaces between fabric logic and processing subsystems. Lead the FPGA Engineering team of 3+ people in the development and delivery of Astrolab FPGA RTL design and verification. Support FPGA Engineering direct reports through their technical work, performance evaluations, and career growth.

Own unit level RTL development from blank sheet to flight for Microsemi, Xilinx, or other FPGA or SoC devices in either Verilog or VHDL. Perform design verification including simulations, test benches, timing analysis, and hardware testing. Lead design reviews, demonstrate requirement traceability, and create documentation for FPGA operation and interfacing with other SW and FPGA systems.

Lead and participate in test campaigns ranging from unit level manual tests, unit automated tests, and system level tests. Bachelor of Science degree in Computer Engineering, Electrical Engineering, or equivalent. 10+ years of experience in FPGA RTL architecture, development, verification, deployment, and maintenance.

2+ years of team leadership experience as manager of direct reports. Skilled at Verilog or VHDL. Skilled in at least 1 scripting language (TCL, shell, Python, etc).

Skilled in verification techniques, and timing/stability analysis. Proficiency in understanding PCB designs and reading schematics. Proficiency in understanding embedded software.

Proficiency with AXI protocols (at least AXI4 family). Knowledge of common bus and memory interfaces (DDR4, SPI, I2C, UART, etc). Demonstrated success working in a dynamic environment.

Responsibilities

Design for space environments including radiation impacts and mitigations.

Benefits

, including medical, dental, vision, and mental health support 401(k) plan with company match Flexible PTO and parental leave Home office set up reimbursement Fully flexible and remote friendly work environment Weekly lunch stipend, plus complimentary snacks and beverages on-site Once a month social hour on-site with food and drinks